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PC Processors

Processors

80386:

The 80386SX uses the 80387SX as its fastest coprocessor, and has a 32-bit word size and 16-bit data path.

The 80386DX uses the 80387DX coprocessor, and has a 32-bit word size and data path.

80486:

The 80486SX has a disabled coprocessor, and a 32-bit word size and data path.

The 80486DX2 runs internally at twice the motherboard bus speed.

The 80486DX4 runs internally at three times the motherboard bus speed.

Pentium:

Processor speed determined by motherboard bus speed times bus multiplier.

Uses ZIF (Zero Insertion Force) Socket 7

Pentium MMX:

57 additional instructions for manipulating video, audio, and graphical data.

SIMD: Single Instruction Multiple Data

Increased built-in cache

Uses ZIF Socket 7

Pentium Pro:

Multiple Branch Prediction - predicts when instructions are to be processed

Dataflow analysis

Speculative execution

Uses 387-pin ZIF Socket 8

Pentium II:

System bus allows multiple simultaneous transactions.

Uses Single Edge Connector (SEC) design. L1 and L2 cache are contained in the cartridge.

Uses 242 SEC Slot 1

Floating-point numeric operations are dealt with by the math coprocessor.

The 80386SX uses the 80387SX as its fastest coprocessor, and has a 32-bit word size and 16-bit data path.

The 80386DX uses the 80387DX as its fastest coprocessor, and has a 32-bit word size and data path.

The 80486SX has a disabled coprocessor, and 32-bit word size and data path.

A 486DX2's external clock speed is half of the internal clock speed.

A 486DX4's external clock speed is 1/3 of the internal clock speed.

Protected mode is a processor feature that allows 2 or more programs run without interfering with one-another.

Superscalar - Two chips inside; one for parallel processing and the other for fault tolerance.

Instructions / clock cycle - 4 instructions, 2 on each path.

MMX:

1) 57 instructions for manipulating video, audio and graphic data

2) SIMD: Single Instruction Multiple Data

3) More build-in cache on chip

Dynamic Execution (Pro):

1) Multiple branch prediction Predicts when instructions are to be processed

2) Dataflow analysis Analyzes instructions

3) Speculative execution

Pentium II System Bus allows multiple simultaneous transactions.

SEC - (Pentium II) Single Edge Cartridge design. Core and L2 Cache in cartridge, designed for single and dual processor computers.

Cache:

L1 - Internal Cache

L2 - External Cache

CPU Connectivity:

Socket 7 - Pentium CPUs

Socket 8 - Pentium Pro 387-pin ZIF contact connector

Slot 1 - Pentium II 242 SEC contact connector

The first generation Pentium ran at 5 volts but as clock speends increased the voltage needed to be reduced to 3.3 volts to reduce heat dissipation in second generation Pentium.

The Pentium Pro processor uses a 2.46" x 2.66" 387-pin PGA.

The Pentium Pro has an on board L2 cache.

The Pentium II processor is housed in a SEC cartridge. The cartridge uses a retnetion mechanism to hold the device in place.

The three most common brand names of BIOS software are American Megatrends, Phoenix Technologies, and Award.

The number of conductors used in the address bus will determine the maximum amount of memory addressable by the CPU.

VESA (Video Electronics Standards Association) local bus slots can support memory, network cards, video cards and hard drive controllers.

ATA drives tranfer data to and from the hard drive and memory via standardardized protocols called PIO modes (Programmed Input Output). With PIO data is exchanged between main memory and a peripheral device, not by means of DMA, but with in and out instructions via the CPU.

Power On Self Test (POST) loads first, then bootstrap loader finds the operating system, then the BIOS serves as the main interface between the software and the hardware.

CPU	Comment	Year	X clock - MHZ	Int clock - MHZ	Access - Mem. Up 2	Int. Cache	Co-proc	Int bus (word size)	Ext. bus (data path)
8086	1st CPU	1978	5	5	1 meg	no	no	16 bit	16 bit
8088 (total of 640K of total memory) Add bus: 20Mhz	Used in the 1st IBM PC/XT, 29000 transistors	1979	8	8	1 meg	no	no	16 bit	8 bit
80286 (uses PLCC IC case; found in most AT; soldered to system board; Add bus 24 Mhz	Introduced idea of protected mode, 134000 tr.	1982	8 10 12	8 10 12	16 Meg	no	no	16 bit	16 bit
80386DX (first to have ability to multitask); Add bus: 32 Mhz for 386 and 486	Can switch between real & prtotected mode without rebooting; 1st true 32 bit CPU; 275000 tr.	1985	16 20 25 33	16 20 25 33	4 Gb	no	no	32 bit	32 bit
80386SX	Cheaper version of 386 known as derivative chip	1988	16 20 25 33	16 20 25 33	4 Gb	no	no	32 bit	16 bit
80486DX 5 VOLTS	Intro duced L1 cache; twice as fast as 386; 1.2 million tr	1989	25 33 50	25 30 55	4 Gb	8K	Yes	32 bit	32 bit
80486SX	Same as 486 but with disabled co-proc	1991	25 33 50	25 30 50	4 Gb	8K	no	32 bit	32 bit
80486DX2	Can execute instru. In 1 cycle rather 2 cycles in DX	1992	25 33	50 66	4 Gb	8K	yes	32 bit	32 bit
80486DX4	Runs 3 X speed motherb.	1994	25 33 75 100		4 Gb	8K	yes	32 bit	32 bit
Pentium (considered fault tolerant) 3 VOLTS SLOT 7 Add bus is 64 Mhz	64 bit data bus, can execute 2 instr. At the same time using super- scaler tech.; 2 int. 8K cache chips; cache controller built on board; 3.1 mill trans	1993	60 66	60 66 90 100 133 150 166 200	4 Gb	16 K	yes	64 bit	32 bit
Pentium MMX SLOT 7	add.Instruc. Better handle video / graphics; improves perf. Mult. By 50-100%, to use MMX programs need written in MMX	1996	Same Pentium	same	same	same	same	same	Same
Pentium PRO SLOT 8 L1, L2 cache	Speculative execution; dataflow analysis; 5.5 mil. Trans.	1996	66 180 200					64 bit	32 bit
Pentium II SLOT 1 L1: yes L2: 512 K	Use prop. Socket design 242 SEC; L2 cache built in, 7.5 mil trans	1997	66-100- 233-266- 300-333- 350-366- 400-450	4 Gb	16 K	yes		64 bit	64 bit
Pentium III		1999	100-500- 550

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Please Read -DISCLAIMER: Technology changes very rapidly. The information presented here was believed to be accurate at the time it was gathered. No claim is made that this information is up to date, or that it represents the current technology used today.

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